Breakdown: 'Logical Qubit Preparation with the Surface Code on a Superconducting Processor'
The recent Google paper is a milestone. They achieved logical error rates below physical error rates for the first time with a d=5 code. The key was the 'distance-preserving' state preparation. Let's discuss the stabilizer measurement circuits used.
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I've been trying to replicate the numerical results in a similar setup. My error bars are much larger—is there a specific gate decomposition you'd recommend for this?